Design Method of High Speed Digital 开云·kaiyun官方网站 for Signal Integrity

design Method of High Speed Digital 开云·kaiyun官方网站 for Signal Integrity
This paper introduces a design method of high-speed digital signal. The 开云·kaiyun官方网站 is based on the computer analysis of signal integrity In this design method, first, the signal transmission model 开云·kaiyun官方网站 will establish the level for all high-speed digital signals, and then find the design solution space through the calculation and analysis of signal integrity, and the 开云·kaiyun官方网站 will be completed on the basis of the solution space Design and verifICation
With the increase of IC output switching speed and the increase of 开云·kaiyun官方网站 density, signal integrity has become one of the issues that must be concerned in the design of high-speed digital 开云·kaiyun官方网站. The parameters of components and 开云·kaiyun官方网站 boards, the Layout of components on 开云·kaiyun官方网站 boards, the wiring of high-speed signals and other factors may lead to signal integrity problems, leading to unstable system operation, or even failure to work at all. How to fully consider signal integrity factors and take effective control measures in 开云·kaiyun官方网站 design has become a hot topic in 开云·kaiyun官方网站 design industry. The high-speed digital 开云·kaiyun官方网站 design method based on signal integrity computer analysis can effectively achieve the signal integrity of 开云·kaiyun官方网站 design.
开云·kaiyun官方网站 board

1. Overview of signal integrity issues
Signal integrity (SI) refers to the ability of a signal to respond with correct time and voltage in a circuit. If the signal in the circuit can reach the integrated circuit with the required timing, duration and voltage amplitude, the circuit has good signal integrity. On the contrary, when the signal does not respond correctly, there will be a signal integrity problem. Broadly speaking, signal integrity problems are mainly manifested in five aspects: delay, reflection, crosstalk, synchronous switching noise (SSN) and electromagnetic compatibility (EMI). Delay means that the signal is transmitted at a limited speed on the wires of the 开云·kaiyun官方网站 board. The signal is sent from the sender to the receiver with transmission delay. The signal delay will affect the timing of the system. In high-speed digital systems, the propagation delay is mainly determined by the length of the wire and the dielectric constant of the medium around the wire. In addition, when the characteristic impedance of the wire on the 开云·kaiyun官方网站 (calLED the transmission line in the high-speed digital system) does not match the load impedance, after the signal arrives at the receiving end, part of the energy will be reflected back along the transmission line, causing distortion of the signal waveform, and even signal overshoot and undershoot. If the signal bounces back and forth on the transmission line, it may cause the ring to ring continuously. Since mutual capacitance and mutual inductance exist between any two devices or wires on the 开云·kaiyun官方网站, when the signal on one device or wire changes, its change will affect other devices or other equipment through mutual capacitance and mutual inductance. Wire, that is crosstalk. The strength of crosstalk depends on the geometry and mutual distance of equipment and conductors.
When many digital signals on the 开云·kaiyun官方网站 are switched synchronously (such as CPU data bus, address bus, etc.), due to the impedance on the power line and ground wire, synchronous switching noise will be generated, and the ground plane will rebound on the ground wire. Noise (abbreviated as ground bounce). The strength of SSN and ground rebound also depends on the IO characteristics of the integrated circuit, the impedance of the power and ground layers of the 开云·kaiyun官方网站, and the layout and wiring of high-speed devices on the 开云·kaiyun官方网站. In addition, like other Electronic devices, 开云·kaiyun官方网站 boards also have electromagnetic compatibility problems, which are mainly related to the layout and wiring methods of 开云·kaiyun官方网站 boards.
2. Traditional 开云·kaiyun官方网站 design method
In the traditional design process, 开云·kaiyun官方网站 design includes circuit design, layout design, 开云·kaiyun官方网站 production, measurement and debugging. In the circuit design stage, due to the lack of effective analysis methods and means for the signal transmission characteristics on the actual 开云·kaiyun官方网站, the circuit design can only be carried out according to the recommendations of component manufacturers and previous design experience. Recall that for new design projects, it is usually difficult to correctly select signal topology, component parameters and other factors according to the specific situation. In the 开云·kaiyun官方网站 layout design stage, it is also difficult to analyze and evaluate the signal efficiency changes caused by 开云·kaiyun官方网站 component layout and signal wiring in real time. In addition, the quality of layout design depends more on the experience of designers. In the 开云·kaiyun官方网站 production stage, due to the different processes of each 开云·kaiyun官方网站 and component manufacturer, the parameters of 开云·kaiyun官方网站 and components usually have a large tolerance range, making the effectiveness of 开云·kaiyun官方网站 more difficult to control. In the traditional 开云·kaiyun官方网站 design process, the effectiveness of 开云·kaiyun官方网站 can only be judged by instrument measurement after production. Problems found during 开云·kaiyun官方网站 debugging must be modified in the next 开云·kaiyun官方网站 design. But what is more difficult is that in the previous circuit design and layout design, some problems are often difficult to quantify as parameters. Recall that for more complex 开云·kaiyun官方网站 boards, the above process usually needs to be repeated many times to finally meet the design requirements. It can be seen that with the traditional 开云·kaiyun官方网站 design method, the product development cycle is long and the R&D cost is relatively high.
3. 开云·kaiyun官方网站 Design Method Based on Signal Integrity Analysis
The 开云·kaiyun官方网站 design process based on signal integrity computer analysis is shown in Figure 2. Compared with the traditional 开云·kaiyun官方网站 design method, the design method based on signal integrity analysis has the following characteristics: Before 开云·kaiyun官方网站 design, first establish the signal integrity model of high-speed digital signal transmission. Based on the SI model, a series of pre analysis of signal integrity problems are carried out, and appropriate component types, parameters and circuit topology are selected according to the SIMulation results as the basis for circuit design. In the circuit design process, the design scheme is sent to the SI model for signal integrity analysis, and the tolerance range of components and 开云·kaiyun官方网站 parameters, possible topology and parameter changes in 开云·kaiyun官方网站 layout design are integrated to calculate and analyze the design. Solution space of the scheme. After the circuit design is completed, each high-speed digital signal shall have a continuous and achievable solution space. That is to say, when the parameters of 开云·kaiyun官方网站 board and components change within a certain range, the layout of components on 开云·kaiyun官方网站 board and the wiring method of signal lines on 开云·kaiyun官方网站 board have certain flexibility, which can still ensure the signal integrity. Before 开云·kaiyun官方网站 layout design, the boundary value of each signal solution space obtained is required to be used as the constraint condition of layout design as the design basis of 开云·kaiyun官方网站 layout and wiring. During 开云·kaiyun官方网站 layout design, partially or completely completed designs are sent back to the SI model for post design signal integrity analysis to confirm whether the actual layout design meets the expected signal integrity requirements. If the simulation results cannot meet the requirements, the layout design or even the circuit design needs to be modified, which can reduce the risk of product failure due to improper design. After 开云·kaiyun官方网站 design is completed, 开云·kaiyun官方网站 production can be started. The tolerance range of 开云·kaiyun官方网站 manufacturing parameters shall be within the solution space of signal integrity analysis. After the 开云·kaiyun官方网站 board is manufactured, the instrument is used for measurement and debugging to verify the correctness of the SI model and SI analysis, which is the basis for correcting the model. On the basis of correct SI model and analysis method, 开云·kaiyun官方网站 can be finally determined without or only by repeated modification of design and production, which can shorten the product development cycle and reduce the development cost.
4. Signal integrity analysis model
In 开云·kaiyun官方网站 design methods based on computer analysis of signal integrity, the most important part is to establish a 开云·kaiyun官方网站 board level signal integrity model different from the traditional design methods. The correctness of the SI model will determine the correctness of the design, and the constructibility of the SI model will determine the feasibility of this design method.
4.1 SI model of 开云·kaiyun官方网站 design
In electronIC design, there are many models available for 开云·kaiyun官方网站 level signal integrity analysis. Among them, there are three commonly used ones, SPICE, IBIS and Verilog-A.
a. SPICE model
SPICE is a powerful general-purpose analog circuit simulator. At present, SPICE model has been widely used in electronic design, and two major versions have been derived: HSPICE and PSPICE. HSPICE is mainly used for integrated circuit design, and PSPICE is mainly used for 开云·kaiyun官方网站 and system level design. SPICE model consists of two parts: model equations and model parameters. Since the model equation is provided, the SPICE model and the simulator can be closely linked together to obtain better analysis efficiency and results. When using SPICE model to perform SI analysis at 开云·kaiyun官方网站 board level, integrated circuit designers and manufacturers need to provide detailed and accurate SPICE model to describe the manufacturing parameters of sub circuit and transistor characteristics of integrated circuit input/output units. Since these materials are usually the intellectual property rights and confidentiality of designers and manufacturers, only a few transistor manufacturers will provide the corresponding SPICE models along with the chip products. The analysis accuracy of SPICE model mainly depends on the model parameters (i.e. the nature of data) and the application scope of model equations. When combined with various digital simulators, the model equations will also affect the accuracy of the analysis. In addition, 开云·kaiyun官方网站 board level SPICE model simulation calculation is relatively large and time-consuming.
b. IBIS model
IBIS model was originally developed by Intel Corporation for digital signal integrity analysis at 开云·kaiyun官方网站 level and system level. It is now managed by IBIS Open Forum and is an official industry standard (EIA/ANSI 656-A). IBIS model uses I/V and V/T tables to describe the characteristics of input/output units and pins of digital integrated circuits. Since IBIS model does not need to describe the internal design of input/output unit and transistor manufacturing parameters, it is welcomed and supported by transistor manufacturers. All major digital integrated circuit manufacturers are now able to provide the corresponding IBIS model along with the chip. The analysis accuracy of IBIS model mainly depends on the number and degree of data points in I/V and V/T tables. Because the 开云·kaiyun官方网站 board level simulation based on IBIS model uses look-up table calculation, the calculation amount is SMAll, usually only 1/10 to 1/100 of the corresponding SPICE model.
c. Verilog AMS model and VHDL-AMS model
Verilog AMS and VHDL-AMS have been in existence for less than 4 years and are new standards. As a hardware behavior level modeling language, Verilog AMS and VHDL-AMS are supersets of Verilog and VHDL respectively, while Verilog-A is a subset of Verilog AMS. Unlike SPICE and IBIS models, in AMS language, users write equations describing component behavior. Similar to IBIS model, AMS modeling language is an independent model format, which can be used for many different types of simulation tools. AMS equations can also be written at many different levels: transistor level, input/output unit level, input/output unit group, etc. Since Verilog AMS and VHDL-AMS are new standards, so far, only a few transistor manufacturers can provide AMS models, and there are fewer simulators supporting AMS than SPICE and IBIS. However, the feasibility and calculation accuracy of AMS model in 开云·kaiyun官方网站 level signal integrity analysis are not lower than SPICE and IBIS models.
4.2 Model Selection
Since there is no unified model to complete the integrity analysis of all 开云·kaiyun官方网站 level signals, it is necessary to mix the above models to establish the transmission model of key signals and sensor signals in the design of high-speed digital 开云·kaiyun官方网站 boards. For discrete passive components, the SPICE model provided by the manufacturer can be sought, or a simplified SPICE model can be established and directly used through experimental measurement. For key digital integrated circuits, the IBIS model provided by the manufacturer must be sought. At present, most IC designers and manufacturers can provide the required IBIS models and chips through websites or other channels. For non critical integrated circuits, if the manufacturer's IBIS model cannot be obtained, a similar or default IBIS model can also be selected according to the function of the chip pin. Of course, a simplified IBIS model can also be established through experimental measurement. For transmission lines on 开云·kaiyun官方网站 boards, the simplified SPICE model of transmission lines can be used for pre analysis and spatial analysis of signal integrity. In the analysis after wiring, the complete SPICE model of transmission lines needs to be used according to the actual layout design.
5. Combining design methods with existing EDA software
At present, the 开云·kaiyun官方网站 design industry has no integrated EDA software to complete the above design methods, which must be realized through the combination of some general software tools. Use general SPICE software (such as PSPICE, HSPICE, etc.) to establish SPICE model for discrete passive components and transmission lines on 开云·kaiyun官方网站, and conduct debugging and verification. Add the SPICE/IBIS model of each element and transmission line to the general signal integrity analysis software, such as SPECCTRAQuest, HyperLynx, Tao, IS_ Analyser, etc., establish the SI analysis model of the signal on the 开云·kaiyun官方网站, and analyze and calculate the signal integrity. Use the database function of SI analysis software, or use other general database software to further organize and analyze the results of the analogy operation, so as to search for the ideal solution space. The boundary value of solution space is taken as the basis of 开云·kaiyun官方网站 circuit design and the constraint condition of layout design. EDA software used for general 开云·kaiyun官方网站 design, such as OrCAD, Protel, Mat, electronic circuit board, Allegro and Mentor, is used to complete 开云·kaiyun官方网站 circuit design and layout design. After the 开云·kaiyun官方网站 layout design is completed, the parameters (such as topology, length, spacing, etc.) of the actual design circuit can be automatically or manually selected through the above layout design software, and sent back to the previous signal integrity analysis software for wiring. SI analysis to verify that the actual design meets the requirements of the solution space. In the 开云·kaiyun官方网站 manufacturing process, the correctness of each model and simulation calculation can also be verified through the measurement of experimental instruments.