Anti interference Design of DSP High Speed 开云·kaiyun官方网站

Anti interference design of DSP High Speed 开云·kaiyun官方网站
With this wide applICation of DSP (Digital Signal Processor), the design of a high-speed signal processing system 开云·kaiyun官方网站 based on DSP design is particularly important In the DSP System, the working frequency of the DSP microprocessor can be up to hundreds of MHz, and its reset line, interrupt line and control line, integrated circuit switch, high-precision A/D conversion circuit, and circuits containing weak analog signals are vulnerable to interference; Therefore, it is very important to design and develop a stable and reliable DSP system Interference, or interference energy, puts the receiver in an undesirable state There are two types of interference: direct (coupling via conductors, common impedance, etc.) and indirect (coupling via crosstalk or radiation) Many electrical EMIssion sources, such as light, motor, and fluorescent lamp, will cause interference, and there are three necessary ways for electromagnetic interference (EMI) to have an impact, that is, interference sources, transmission routes, and interference receptors It only needs to cut off one of them Electromagnetic interference problems
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1. Analysis of interference in DSP system
In order to make the DSP system stable and reliable, interference must be eliminated from all aspects. Even if it cannot be completely eliminated, interference should be reduced as much as possible. For DSP system, the main interference comes from the following aspects:
1) Input and output channel interference. This means that the interference enters the system through the forward channel and the backward channel, such as the data acquisition link of the DSP system. The interference is superimposed on the signal through the sensor, increasing the data acquisition error. In the output link, the interference will add new output data errors, or even complete errors, leading to the system crash. Use optocoupler devices reasonably to reduce the interference of input and output channels. For the interference of the sensor and DSP main system, power isolation can be used to introduce positive interference.
2.) Interference of power system. The main interference source of the whole DSP system. When the power supply supplies power to the system, it will also add noise to the power supply. In designing the power chip circuit, the power line must be decoupLED.
3) Space radiation coupling interference. Coupling through radiation is often referred to as crosstalk. When the current flows through the wire, crosstalk will occur, causing the electromagnetic field to induce transient current in the adjacent wire, leading to distortion or even error of adjacent signals. The strength of crosstalk depends on the geometry and spacing of equipment and conductors. In DSP cabling, the greater the distance between the signal line and the ground wire, the closer to the ground wire, and the more effective the reduction of crosstalk.
2. Design 开云·kaiyun官方网站 for the cause of the interference
The methods to reduce various interferences in the manufacturing process of DSP system 开云·kaiyun官方网站 are given below.
2.1 Lamination design of multilayer plates
In DSP high-speed digital circuit, in order to improve the signal quality and reduce the difficulty of wiring, the EMC of the newly added system is usually designed by stacking multiple layers of boards. Stack design can provide short return path, reduce coupling area and suppress differential mode interference. In the stack design, dedicated power and ground planes are distributed, and the ground and power planes are tightly coupled to suppress common mode interference (adjacent planes are used to reduce the AC impedance of the power plane). There is a power layer below the top layer, and the power pin of the component can be directly connected to the power supply without passing through the grounding plane. The key signals are selected at the bottom layer (bottom layer), so that the important signal routing space is larger, and the equipment is placed on the same layer as far as possible. If it is unnecessary, do not use two layers of parts to make circuit boards, which will increase assembly time and assembly complexity. For example, on the top layer, only when the top layer components are too dense, can devices with limited height and low heat generation (such as decoupling capacitors (patches)) be placed on the bottom layer. For DSP systems, it may be necessary to lay a large number of wires, which can be routed in the inner layer using a stacked design. If the traditional through-hole wastes a lot of valuable wiring space, the blind buried through-hole can be used to increase the wiring area.
2.2 Layout design
In order to obtain the efficiency of DSP system, the Layout of components is very important. First place DSP, flash memory, SRAM and CPLD devices. These devices should carefully consider the routing space, then place other ICs according to the principle of functional independence, and consider the placement of I/O ports. Considering the size of 开云·kaiyun官方网站 based on the above layout: if the size is too large, the printed circuit is too long, the impedance increases, and the noise resistance decreases, the cost of manufacturing the 开云·kaiyun官方网站 will also increase; If the 开云·kaiyun官方网站 board is too SMAll, the heat dissipation will be poor, the space is limited, and adjacent circuits are vulnerable to interference. In this case, the equipment shall be selected according to the actual needs, and the size of 开云·kaiyun官方网站 shall be roughly calculated according to the wiring space. When arranging the DSP system, pay special attention to the placement of the following components.
1) High speed signal layout: In the whole DSP system, the main high-speed digital signal lines are located between DSP, flash memory and SRAM. The distance between these devices should be as close as possible, the connection should be as short as possible, and they should be directly connected. In order to reduce the impact of transmission lines on signal quality, high-speed signal traces should be as short as possible. It also needs to be considered that many DSP chips with speeds of several hundred MHz require serpentine winding. This will be highlighted in the wiring below.
2) Digital analog equipment layout: most DSP systems are not single function circuits, and a large number of digital equipment and CMO digital analog hybrid equipment are used. This digital/analog equipment should be arranged separately. The analog signal equipment shall be concentrated as much as possible, so that the independent area belonging to analog signal can be drawn in the middle of the whole digital place analogically, so as to avoid the interference of digital signal and analog signal. Some digital analog mixing equipment, such as D/A converter, are traditionally regarded as analog equipment, placed on analog ground, and provided with a digital loop to echo digital noise to the signal source to reduce digital noise. Influence on analog grounding.
3) Clock layout: for clock, chip selection and bus bar signal, it should be as far away from I/O lines and connectors as possible. The clock input of DSP system is easily disturbed, and its processing is very critical. Always keep the clock generator as close to the DSP chip as possible and keep the clock line as short as possible. The housing of the clock crystal oscillator is grounded.
4) Decoupling layout: In order to reduce the transient overshoot of the voltage on the power supply of the integrated circuit chip, a decoupling capacitor is added on the integrated circuit chip, which can effectively eliminate the impact of burrs on the power supply and reduce the power circuit on the 开云·kaiyun官方网站. The reflection adding decoupling capacitor can bypass the high-frequency noise of the integrated circuit device, and can also be used as a storage capacitor to provide and absorb charging and discharging energy when switching the gate of the integrated circuit. In the DSP system, the decoupling capacitor is placed on each integrated circuit, such as DSP, SRAM, flash memory, etc., and added between each power supply and chip grounding. Special attention should be paid to the decoupling capacitor as close to the power supply end and IC as possible. Part of the foot. Ensure the purity of the current from the power supply end (power supply end) to the IC, and minimize the noise path. When handling capacitors, large through-hole or multi through-hole shall be used, and the connection between through-hole and capacitor shall be as short and thick as possible. When two through-holes are far apart, the path is too large, which is not good; The closer the two through holes of the decoupling capacitor are, the better. This noise can reach the ground through a short path. In addition, it is very beneficial to add high-frequency capacitors at the power input or battery supply. Under normal circumstances, the value of decoupling capacitor is not very strict. Generally, it is calculated according to C=l/, that is, when the frequency is 10 MHz, 0.1 Î is taken ¼ F capacitor.
5) Power supply layout: When developing a DSP system, you need to carefully consider the power supply. Since some power chips generate a lot of heat, they should be placed at a position favorable for heat dissipation and separated from other components at a certain distance. Heat dissipation can be achieved by adding heat sinks or placing copper under the device. Be careful not to place the heating element on the bottom layer of the developing plate.
6) Other precautions: For the layout of other components of the DSP system, the requirements of easy welding, easy debugging and beautiful appearance should be considered as far as possible. For example, adjustable devices such as potentiometers, adjustable inductors, variable capacitors and DIP switches shall be placed in combination with the overall structure. For equipment over 15g, a new fixed bracket shall be added, and then welding shall be carried out. Pay special attention to the position occupied by the positioning hole and fixed bracket of 开云·kaiyun官方网站. The distance between the components on the edge of the 开云·kaiyun官方网站 board and the edge of the 开云·kaiyun官方网站 board is generally not less than 2mm. The 开云·kaiyun官方网站 board is rectangular with a aspect ratio of 3:2 or 4; three
2.3 Wiring design
Considering the improvement of anti-interference capability of DSP system and the enhancement of EMC capability of layout, some measures and skills must be taken when wiring.
1) DSP cabling: cabling usually starts from the device and expands around the device. For devices packaged in PQFP (plastic quad plane package) or BGA (BaIl grid array), such as DSP, the wiring direction should be roughly determined according to the layout of SRAM, flash memory and CPLD, and the pins should be fanned out. Fan out is particularly important for QFP and BGA type devices. At the beginning of wiring, fanning out the pin of BGA type device can save the time of subsequent wiring and improve the quality and efficiency of wiring. During wiring, the functions of EDA tools, such as dynamic wiring of power 开云·kaiyun官方网站 board, shall be reasonably used to plan the space. When dynamic is used, this function will automatically keep the line spacing within the rule range without wasting space, reducing subsequent modifications, and improving the quality and efficiency of routing. For high-speed DSP, attention should also be paid to crosstalk and delay tuning routing. Snake processing can ensure signal integrity and continuity of high-speed signal reference plane. When it is necessary to divide the plane, be careful not to let the high-speed line pass through the discontinuous plane; If crossing is necessary, add capacitors on the plane. When the interval between signal lines (traces) is three times the width of signal lines, the probability of mutual crosstalk (coupling) between signals is only about 25%, which can meet the requirements of anti electromagnetic interference (EMI). Recall that for high-speed signal lines, such as CLK and SRAM, please remember that the signal lines far away from them are more than 3 times wide. When adjusting the length, that is, the serpentine track, the width of the line and the line should be greater than 3 times the width of the signal line, including its own signal line, which is also 3 times the width of the signal line. The wire width is 5 mils, and the distance inside the winding is 15 mils, which is greater than or equal to 3 times the wire width.